The Ultimate Hitchhiker's Guide to Verification

Dumping ground of useful links/articles/tips/tricks on System Verilog/VMM/OVM as and when I stumble upon them and some of my views on it :)

Few minor updates

Two small updates from my blog.

  1. My blog has started getting attentions from Verification community. Recently my blog got added to blogroll of VMM martial art blog ( Seems people are finding my blog worth reading/visiting. My blog is feeling blessed :)
  2. With almost 4-5 hrs of effort I could make syntaxhighlighter work (with small minor hiccups). It took way too much time as compared to what I hoped for, but the end result of it is worth it. A sample o/p from syntax highlighter.

// Byte Pack
function int unsigned atm_cell::byte_pack(ref logic [7:0] bytes[],
                                          input int unsigned offset,
                                          input int kind);
   // Make sure there is enough room in the array
   if(bytes.size() < this.byte_size())
        bytes = new [this.byte_size()] (bytes);
   // Pack the bytes
   bytes[0] = {gfc, vpi[7:4]};
   bytes[1] = {vpi[3:0], vci[15:12]};
   bytes[2] = {vci[11:4]};
   bytes[3] = {vci[3:0], pt, clp};
   bytes[4] = {hec};
   for (int i=0; i < 48; i++)
   byte_pack = 53;

// Byte Unpack
function int unsigned atm_cell::byte_unpack(const ref logic[7:0] bytes[],
                                            input int unsigned offset,
                                            input int len,
                                            input int kind);
   {gfc, vpi, vci, pt, clp, hec} = {bytes[0], bytes[1], bytes[2],
                                     bytes[3], bytes[4]};
   for (int i = 0; i != 48; ++i)
     payload[i] = bytes[i+5];

   return 53;


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I am from Sambalpur, Orissa, India. Have done Btech and Mtech in ECE from IIT Kharagpur. Currently working as Lead Member Technical Staff at Mentor Graphics Noida

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