The Ultimate Hitchhiker's Guide to Verification

Dumping ground of useful links/articles/tips/tricks on System Verilog/VMM/OVM as and when I stumble upon them and some of my views on it :)

System Verilog Gotchas - by Stuart Sutherland

In one of my last post I have added one of the System Verilog Gotcha paper. There are 2 more System Verilog Gotcha presentations (this time by Stuart Sutherland).


The compete presentation/papers of Stuart on System Verilog, Verification, Verilog can be viewed at http://www.sutherland-hdl.com/papers-by-sutherland.php

0 comments:

Post a Comment

About Me

My photo
I am from Sambalpur, Orissa, India. Have done Btech and Mtech in ECE from IIT Kharagpur. Currently working as Lead Member Technical Staff at Mentor Graphics Noida

My Feedburner

Followers

Search This Blog

There was an error in this gadget
There was an error in this gadget
There was an error in this gadget

My Shelfari Bookshelf

Shelfari: Book reviews on your book blog

 

Traffic Summary

There was an error in this gadget