The Ultimate Hitchhiker's Guide to Verification

Dumping ground of useful links/articles/tips/tricks on System Verilog/VMM/OVM as and when I stumble upon them and some of my views on it :)

System Verilog Gotchas - by Stuart Sutherland

In one of my last post I have added one of the System Verilog Gotcha paper. There are 2 more System Verilog Gotcha presentations (this time by Stuart Sutherland).

The compete presentation/papers of Stuart on System Verilog, Verification, Verilog can be viewed at


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I am from Sambalpur, Orissa, India. Have done Btech and Mtech in ECE from IIT Kharagpur. Currently working as Lead Member Technical Staff at Mentor Graphics Noida

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