System Verilog Gotchas - by Stuart Sutherland

In one of my last post I have added one of the System Verilog Gotcha paper. There are 2 more System Verilog Gotcha presentations (this time by Stuart Sutherland).

• System Verilog Gotchas
• More System Verilog Gotchas
  

The compete presentation/papers of Stuart on System Verilog, Verification, Verilog can be viewed at http://www.sutherland-hdl.com/papers-by-sutherland.php