Mentor Graphics NOIDA is hiring.
Please mail me your resume at subash.nayak@gmail.com if you want to apply to any of the below jobs.
One small update
Hi all,
To begin with let me thank all for visiting my blog. I have got many feedback on how people (few whom I know personally, and many I don't know) have used my blog for learning SV and preparing for job interviews. It feel good knowing that I have contributed something positively (a very little, I know :)) to the society via my blog.
There is a small news to share with you all. Recently I have joined Mentor Graphics NOIDA as LMTS, where I am involved in tool development effort. So it is hardcore C++ coding/debug for me, and very little SystemVerilog/Verification. So from now on I am planning to blog on C/C++/SW development mostly, little less SV.
Regards,
-Subash
To begin with let me thank all for visiting my blog. I have got many feedback on how people (few whom I know personally, and many I don't know) have used my blog for learning SV and preparing for job interviews. It feel good knowing that I have contributed something positively (a very little, I know :)) to the society via my blog.
There is a small news to share with you all. Recently I have joined Mentor Graphics NOIDA as LMTS, where I am involved in tool development effort. So it is hardcore C++ coding/debug for me, and very little SystemVerilog/Verification. So from now on I am planning to blog on C/C++/SW development mostly, little less SV.
Regards,
-Subash
Few nice articles on UVM
- A Practical Guide to Adopting the Universal Verification Methodology—Part 1
- A Practical Guide to Adopting the Universal Verification Methodology—Part 2
- A Practical Guide to Adopting the Universal Verification Methodology—Part 3
- A Practical Guide to Adopting the Universal Verification Methodology—Part 4
How Do I Get Environment Variable into a String in SystemVerilog
From Synopsys Solvnet, Needs to have Solvnet id, seems to be specific to VCS
