System Verilog Fine Grain Process Control - Beyond SV LRM - Part I

There is exactly 1 and 1/2 page long section on "Fine grain process control" is SV LRM (along with not so easy to follow example). No wonder I have not seen much people using this nice feature of System Verilog. Fortunately Synopsys  SolvNet has 3 nice article on it. I am listing them for reference. Hope it shall be useful to the reader. (NOTE : accessing these articles requires solvnet login, which I was told, is not so easy to obtain unless your organization has a vcs license, the truthfulness of  which I have not yet verified)

SN	Article Title
1	Fine Grain Process Control: Handle Creation & Status Check
2	Fine Grain Process Control: Process Await & Kill
3	Fine Grain Process Control: Process Suspend & Resume